FPGA Site

Adam Taylor is the well known author of the MicroZed Chronicles blog on Xilinx website. His Chronicles have been running for several years, and Adam has already compiled entries from his blog in two books. The first book is offered for free on the FPGARelated website for registered users. This is a partial list of the book contents: Introduction to the Zynq Software environment and configuration The Boot loader XADC Multiplexed IO Timers, clocks and watchdogs Processing System and Programmable Logic DMA Adding an Operating System MultiProcessing etc. The book can be find here . Author Adam Taylor is a regular contributor on Xilinx Xcell Daily Blog  and he also has his own website .

Image source: Xilinx "Xilinx today announced that its high-performance Xilinx® Virtex® UltraScale+™ FPGAs are available in Amazon Elastic Compute Cloud (Amazon EC2) F1 instances. This instance provides programmable hardware acceleration with FPGAs and enables users to optimize their compute resources for the unique requirements of their workloads... ... F1 instances will be used to solve complex science, engineering, and business problems that require high bandwidth, enhanced networking, and very high compute capabilities. They are particularly beneficial for applications that are time sensitive such as clinical genomics, financial analytics, video processing, big data, security, and machine learning. " The Virtex Ultrascale+ family is based on the new  16 nm FinFET+  technology, and has the following features: Up to 8GB of HBM Gen2 integrated in-package  Up to 500Mb of on-chip memory integration  Integrated  100G Ethernet MAC  with RS-FEC ...

Wind turbines over the years - Infographic source: Dong Energy A/S

On the following three-part tutorial, a square waveform generator is presented. The requirements for the project are to generate a sequence of square waveforms with different frequencies. For each frequency a number of cycles is generated (different for each one). For each frequency, a distinct duty cycle is also defined. In this implementation the frequency is defined in Hz., and the active high time in ns. The VHDL code does not validate the parameters, i.e, if the active high time for any frequency is longer than its period, the output will be always '1' for that frequency. For each frequency, a number of cycles is defined. This project was born over a discussion in Xilinx forums . Once I did the project for a specific configuration I started thinking about a way to make a generic solution, and this tutorial tries to reflect the design process of this small project. The code is presented below. Three different frequencies FREQ1..3 are defined for this example, 242KHz...

Big Gross (himself an entrepreneur who has founded quite a few startups) analyzes the main reasons for success and failure of startups, and pinpoints a surprising main reason for that.

The comics strip says it all... ... or maybe not. There are so many missing: Ethernet, Fast Ethernet, Gigabit Ethernet The diverse Windows versions... and Unix, and Linux Serial Rapid IO, Infiniband PDAs, disc-man, MP3-player, tablets, digital cameras ADSL, optic fiber, and so many others... BTW, I first thought about this comics strip while reading about IoT. Will it be a success or will it be forgotten? I remember that in its time, ATM was also thought to be "the next thing, for sure". Well, it didn't happen... What would your list have?

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